DocumentCode :
2061445
Title :
4.3 Fine-grained adaptive power management of the SPARC M7 processor
Author :
Krishnaswamy, Venkat ; Brooks, Jeffrey ; Konstadinidis, Georgios ; McAllister, Curtis ; Pham, Ha ; Turullols, Sebastian ; Shin, Jinuk Luke ; Yifan YangGong ; Haowei Zhang
Author_Institution :
Oracle, Redwood Shores, CA, USA
fYear :
2015
fDate :
22-26 Feb. 2015
Firstpage :
1
Lastpage :
3
Abstract :
The power management system described in this paper enables more than 3× increase in power-constrained performance over the previous generation of SPARC server CPUs [2]. The low latency and high performance of the system is possible due to accurate, high-bandwidth sensors, fast on-die control and finegrained actuation implemented using both clock cycle skipping and DVFS, as required by the time constants of system constraints.
Keywords :
microprocessor chips; power aware computing; DVFS; SPARC M7 processor; SPARC server CPU; clock cycle skipping; fast-on-die control; fine-grained actuation; fine-grained adaptive power management system; high-bandwidth sensors; power-constrained performance; Clocks; Converters; Hardware; Program processors; Temperature measurement; Temperature sensors; Thermal management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
Type :
conf
DOI :
10.1109/ISSCC.2015.7062932
Filename :
7062932
Link To Document :
بازگشت