DocumentCode :
2062401
Title :
Time-Memory Trade-Off cryptanalysis on FPGA-based parallel machine RASH
Author :
Takahashi, Koichi ; Iida, Masahiro ; Nakajima, Kensuke
Author_Institution :
Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Japan
Volume :
1
fYear :
2000
fDate :
14-17 May 2000
Firstpage :
366
Abstract :
We designed an FPGA-based parallel machine called "RASH" for high speed flexible signal/data processing. Cryptanalysis is one of the most computation intensive applications because huge amounts of logical and/or arithmetic operations are required and FPGA is very suitable for this task. One of the well-known operations in cryptanalysis is "DES challenge" conducted by RSA Data Security. The objective is to find the secret key (56-bit) from a pair of plaintext and ciphertext. Time-Memory Trade-Off (TMTO) cryptanalysis is a practical method to shorten the time for key search when plaintext is given in advance. We demonstrate how TMTO cryptanalysis is well suited to RASH. Using TMTO cryptanalysis, the key will be found at 80% probability within 1 hour after ciphertext is given to 58 units with the appropriate amount of content addressable memory. The recomputation before starting key search takes 27 days on the same RASH configuration.
Keywords :
content-addressable storage; cryptography; field programmable gate arrays; parallel architectures; parallel machines; DES challenge; FPGA-based parallel machine; RASH; TMTO cryptanalysis; Time-Memory Trade-Off cryptanalysis; ciphertext; computation intensive application; content addressable memory; high speed flexible signal/data processing; key search; logical and/or arithmetic operations; plaintext; probability; secret key;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing in the Asia-Pacific Region, 2000. Proceedings. The Fourth International Conference/Exhibition on
Conference_Location :
Beijing, China
Print_ISBN :
0-7695-0589-2
Type :
conf
DOI :
10.1109/HPC.2000.846579
Filename :
846579
Link To Document :
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