An Efficient Implementation of a 2D DWT on FPGA

This paper presents a high-speed implementation of a 2-D fixed-point discrete wavelet transform (DWT) using the embedded DSP48 blocks available on a Xilinx Virtex-4 XC4VLX15-10 FPGA. The full transform uses just 10 DSP48 blocks, 3 block RAMs and 2,126 logic elements when synthesized using Xilinx ISE Version 8.2i and can perform calculations at 197.2 MHz. The results clearly show that by using the DSP48 blocks, it is possible to build computationally efficient DWT algorithms that can operate at higher speeds and with lower overall logic resources than other FPGA solutions that have been reported previously.