DocumentCode :
2062633
Title :
A Unified Streaming Architecture for Real Time Face Detection and Gender Classification
Author :
Irick, Kevin ; DeBole, Michael ; Narayanan, Vijaykrishnan ; Sharma, Rajeev ; Moon, Hankyu ; Mummareddy, Satish
Author_Institution :
Pennsylvania State Univ., University Park
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
267
Lastpage :
272
Abstract :
An integral part of interactive computing environments are systems that have the ability to process information about their users in real-time. In many cases it is desirable to not only recognize a human user but also to extract as much information about the user as possible, such as gender, ethnicity, age, etc. In this paper we present an FPGA implementation of a neural network configured specifically for performing face detection and gender classification in real-time video streams. Our streaming architecture performs the face and gender classification tasks at 30 frames per second on a small sized Virtex-4 FPGA, at accuracy comparable to that of a leading commercial software implementation.
Keywords :
face recognition; field programmable gate arrays; image classification; neural nets; video streaming; Virtex-4 FPGA; gender classification; interactive computing environments; neural network; real time face detection; unified streaming architecture; video streams; Artificial neural networks; Computer architecture; Computer science; Face detection; Field programmable gate arrays; Hardware; Logic; Neural networks; Real time systems; Streaming media;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
Type :
conf
DOI :
10.1109/FPL.2007.4380658
Filename :
4380658
Link To Document :
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