• DocumentCode
    2067294
  • Title

    A high-throughput LDPC decoder for optical communication

  • Author

    Di Wu ; Yun Chen ; Yuebin Huang ; Yeongluh Ueng ; Lirong Zheng ; Xiaoyang Zeng

  • Author_Institution
    State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    As Optical Communication is on the way, conventional LDPC decoders do not work well with the requirement for high throughput over 100 Gb/s. Many new LDPC decoder structures aiming at high throughput have been proposed, such as stochastic decoders, bit serial decoders, digit serial decoders and so forth. In this paper, a Min-Sum fully parallel structure using clock multiplexing is proposed, as an attempt to relieve the wiring problem. This decoder makes full use of clock edges comparing to conventional decoders. With SIMC 0.13um technology, our decoder achieves a throughput of 54.2 Gb/s at 200MHz for the WiMAX standard of 5/6 code rate. Our conjecture is that with lower feature size and higher clock frequency, 100 Gb/s could be achieved.
  • Keywords
    optical communication; parity check codes; LDPC decoder structures; WiMAX standard; bit serial decoders; clock frequency; clock multiplexing; conventional decoders; digit serial decoders; optical communication; parallel structure; stochastic decoders; Bit error rate; Clocks; Decoding; Parity check codes; Radiation detectors; Throughput; Wiring; LDPC; clock multiplexing; high throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6811973
  • Filename
    6811973