DocumentCode :
2067852
Title :
Highly stable data SRAM-PUF in 65nm CMOS process
Author :
Xuelong Zhang ; Pengjun Wang ; Yuejun Zhang
Author_Institution :
Inst. of Circuits & Syst., Ningbo Univ., Ningbo, China
fYear :
2013
fDate :
28-31 Oct. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Physical Unclonable Functions (PUF) are innovative circuit extract key relying upon the intrinsic process variations in interconnects and transistors of integrated circuits. It can be used in many modern cryptographic protocols as keys or unique digital ID. This paper proposes a highly stable SRAM-PUF cell with isolate nMOS to improve the robustness of the circuit. This design is implemented in SMIC 65nm LP CMOS technology and the layout area of the cell occupies 1.9μm×1.15μm. The simulation results show that the SNM of the proposed solution improve 45% performance during a read operation compared with a traditional SRMA-PUF cell architecture. Meanwhile, it has a high level of stability under different corners.
Keywords :
CMOS memory circuits; SRAM chips; cryptographic protocols; integrated circuit interconnections; SMIC LP CMOS technology; circuit extract key; cryptographic protocols; integrated circuits interconnects; integrated circuits transistors; intrinsic process variations; isolate nMOS; physical unclonable functions; size 1.15 mum; size 1.9 mum; size 65 nm; stable data SRAM-PUF; unique digital ID; CMOS integrated circuits; Computer architecture; Inverters; MOS devices; Measurement; SRAM cells; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
ISSN :
2162-7541
Print_ISBN :
978-1-4673-6415-7
Type :
conf
DOI :
10.1109/ASICON.2013.6811994
Filename :
6811994
Link To Document :
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