Thermal management of 3D IC integration with TSV (through silicon via)

Author

Lau, John H. ; Yue, Tang Gong

Author_Institution

Dept. of Mech. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong

fYear

2009

fDate

26-29 May 2009

Firstpage

635

Lastpage

640

Abstract

Thermal performances of 3D stacked TSV (through silicon via) chips filled with copper are investigated based on heat-transfer CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) empirical equations for the equivalent thermal conductive of chips with various copper-filled TSV diameters, pitches, and aspect ratios, (2) the junction temperature and thermal resistance of 3D stacking of up to 8 TSV chips, and (3) the effect of thickness of the TSV chip on its hot spot temperature. Useful design charts and guidelines are provided for engineering practice convenient.

Keywords

computational fluid dynamics; heat transfer; integrated circuit packaging; thermal conductivity; thermal management (packaging); thermal resistance; 3D IC integration; 3D stacked TSV; 3D stacking; aspect ratio; computational fluid dynamic analysis; empirical equations; heat-transfer CFD; junction temperature; thermal management; thermal resistance; through silicon via; Computational fluid dynamics; Copper; Performance analysis; Silicon; Temperature; Thermal conductivity; Thermal management; Thermal resistance; Three-dimensional integrated circuits; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2009. ECTC 2009. 59th

Conference_Location

San Diego, CA

ISSN

0569-5503

Print_ISBN

978-1-4244-4475-5

Electronic_ISBN

0569-5503

Type

conf

DOI

10.1109/ECTC.2009.5074080

Filename

5074080