DocumentCode
2069864
Title
Integrated services digital network controller architecture based on parallel reconfigurable processor
Author
Melnyk, Anatoly ; Salo, Andriy
Author_Institution
Dept. of Comput. Eng., Lviv Polytech. Nat. Univ., Ukraine
fYear
2004
fDate
28-28 Feb. 2004
Firstpage
426
Lastpage
427
Abstract
In This work a new SH architecture of ISDN controller is proposed. The architecture of the proposed controller is based on a parallel reconfigurable processor. A main advantages of a proposed solution are highlighted. Data link and network level protocols are implemented in software for general purpose processors. Physical and data link levels implemented as standards. Physical level utilizes typical ICs. Other data link functions are based on parallel reconfigurable processor.
Keywords
ISDN; parallel architectures; reconfigurable architectures; ISDN controller architecture; data link protocol; general purpose processors; integrated services digital network; network level protocol; parallel reconfigurable processor; physical link level; Access protocols; Automatic control; Communication system signaling; Cyclic redundancy check; Data communication; Digital control; Hardware; ISDN; Modems; Telecommunication standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Modern Problems of Radio Engineering, Telecommunications and Computer Science, 2004. Proceedings of the International Conference
Conference_Location
Lviv-Slavsko, Ukraine
Print_ISBN
966-553-380-0
Type
conf
Filename
1366014
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