• DocumentCode
    2071196
  • Title

    Importance of dynamic faults for new SRAM technologies

  • Author

    Hamdioui, Said ; Wadsworth, Rob ; Reyes, John Delos ; Van de Goor, Ad J.

  • fYear
    2003
  • fDate
    25-28 May 2003
  • Firstpage
    29
  • Lastpage
    34
  • Abstract
    New memory technologies and processes introduce new defects that cause previously unknown faults. Dynamic faults are among these new faults; they can take place in the absence of the traditional static faults. This paper describes the concept of dynamic faults, based on the fault primitive concept. It further shows, based on industrial test results, the importance of such faults for the new memory technologies, and introduces a systematic way for modeling them. It concludes that current and future SRAM products need to consider testability for dynamic faults or leave substantial DPM on the table, and it sets a direction for further research.
  • Keywords
    SRAM chips; fault simulation; integrated circuit modelling; integrated circuit testing; logic testing; DPM; SRAM dynamic faults; SRAM technologies; dynamic fault testability; fault analysis; fault modeling; fault primitive concept; functional fault models; Educational institutions; Fault detection; Information technology; Laboratories; Mathematical model; Microelectronics; Random access memory; SPICE; System testing; Systems engineering and theory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Workshop, 2003. Proceedings. The Eighth IEEE European
  • ISSN
    1530-1877
  • Print_ISBN
    0-7695-1908-3
  • Type

    conf

  • DOI
    10.1109/ETW.2003.1231665
  • Filename
    1231665