DocumentCode :
2074502
Title :
BonnCell: Automatic layout of leaf cells
Author :
Hougardy, S. ; Nieberg, T. ; Schneider, Jurgen
Author_Institution :
Res. Inst. for Discrete Math., Univ. of Bonn, Bonn, Germany
fYear :
2013
fDate :
22-25 Jan. 2013
Firstpage :
453
Lastpage :
460
Abstract :
In this paper we present BonnCell, our solution to compute leaf cell layouts in VLSI design. Our placement algorithm allows to find very compact solutions and uses an accurate target function to guarantee routability. The routing algorithm handles all nets simultaneously using a constraint generation MIP based approach. Finally, yield and electromigration properties are improved in a post-processing phase. Our approach considers design rules already during placement and routing, is able to treat gridless technologies, and easily adapts to new design rules and future technologies as for example double patterning in 14nm and beyond. The experimental results on current 22nm designs of our industry partner show significant improvements both in terms of design quality and turnaround time compared to manual designs done by experienced designers.
Keywords :
VLSI; electromigration; integrated circuit layout; network routing; BonnCell; VLSI design; automatic layout; constraint generation MIP based approach; electromigration properties; leaf cells; placement algorithm; post-processing phase; routability; routing algorithm; Algorithm design and analysis; Field effect transistors; Layout; Logic gates; Routing; Steiner trees;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific
Conference_Location :
Yokohama
ISSN :
2153-6961
Print_ISBN :
978-1-4673-3029-9
Type :
conf
DOI :
10.1109/ASPDAC.2013.6509638
Filename :
6509638
Link To Document :
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