DocumentCode :
2084593
Title :
FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters
Author :
Bhairannawar, S.S. ; Rathan, R. ; Raja, Kiran B. ; Venugopal, K.R. ; Patnaik, L.M.
Author_Institution :
Dept. of Electron. & Commun. Eng., Dayanand Sagar Coll. of Eng., Bangalore, India
fYear :
2012
fDate :
18-20 Dec. 2012
Firstpage :
1
Lastpage :
5
Abstract :
The Multiplier plays an important role in implementing real time Biometric systems, hence high speed with error free multipliers has to be designed. In this paper we propose FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters. The 2×2 Mitchell log multiplier is considered and error correction term is introduced to correct error, to obtain 2×2 Error Free Mitchell Log Multiplier (EFMLM). The higher order Mitchell Log Multiplier are derived from 2×2 EFMLM using Karatsuba Ofman parallel architecture multiplier with no error. The proposed multiplier is used to design Gaussian Filter to enhance the quality of fingerprint image. The Multiplier is synthesized using Spartan 3 FPGA family device XC3S1500-5fg320. It is observed that the performance of proposed architecture is better compared to existing architecture.
Keywords :
field programmable gate arrays; filtering theory; fingerprint identification; recursive estimation; EFMLM; FPGA-based recursive error-free Mitchell log multiplier; Gaussian filter; Karatsuba Ofman parallel architecture multiplier; XC3S1500-5fg320 Spartan 3 FPGA family device; error correction term; fingerprint image quality; higher-order Mitchell log multiplier; image filters; real time biometric systems; FPGA; Fingerprint; Gaussian Image Filter; Karatsuba Ofman Multiplier; Mitchell Log Multiplier; PSNR;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence & Computing Research (ICCIC), 2012 IEEE International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4673-1342-1
Type :
conf
DOI :
10.1109/ICCIC.2012.6510248
Filename :
6510248
Link To Document :
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