• DocumentCode
    2085986
  • Title

    Thread Assignment Optimization with Real-Time Performance and Memory Bandwidth Guarantees for Energy-Efficient Heterogeneous Multi-core Systems

  • Author

    Petrucci, Vinicius ; Loques, Orlando ; Mossé, Daniel ; Melhem, Rami ; Gazala, Neven Abou ; Gobriel, Sameh

  • Author_Institution
    Univ. Fed. Fluminense, Rio de Janeiro, Brazil
  • fYear
    2012
  • fDate
    16-19 April 2012
  • Firstpage
    263
  • Lastpage
    272
  • Abstract
    The current trend to move from homogeneous to heterogeneous multi-core systems promises further performance and energy-efficiency benefits. A typical future heterogeneous multi-core system includes two distinct types of cores, such as high performance sophisticated ("large\´\´) cores and simple low-power ("small\´\´) cores. In those heterogeneous platforms, execution phases of application threads that are CPU-intensive can take best advantage of large cores, whereas I/O or memory intensive execution phases are best suited and assigned to small cores. However, it is crucial that the assignment of threads to cores satisfy both the computational and memory bandwidth constraints of the threads. We propose an optimization approach to determine and apply the most energy efficient assignment of threads with soft real-time performance and memory bandwidth constraints in a multi-core system. Our approach includes an ILP (Integer Linear Programming) optimization model and a scheme to dynamically change thread-to-core assignment, since thread execution phases may change over time. In comparison to state-of-art dynamic thread assignment schemes, we show energy savings and performance gains for a variety of workloads, while respecting thread performance and memory bandwidth requirements.
  • Keywords
    input-output programs; integer programming; linear programming; multiprocessing systems; storage management; CPU-intensive; ILP optimization model; computational bandwidth constraints; dynamic thread assignment schemes; energy-efficient heterogeneous multicore systems; high performance sophisticated cores; integer linear programming optimization model; memory bandwidth constraints; memory intensive execution phases; performance benefits; real-time performance; simple low-power cores; thread assignment optimization; thread execution phases; thread-to-core assignment; Bandwidth; Instruction sets; Measurement; Memory management; Multicore processing; Optimization; Real time systems; Dynamic thread assignment; Energy efficiency; Memory bandwidth; Optimization; Real-time performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Real-Time and Embedded Technology and Applications Symposium (RTAS), 2012 IEEE 18th
  • Conference_Location
    Beijing
  • ISSN
    1080-1812
  • Print_ISBN
    978-1-4673-0883-0
  • Type

    conf

  • DOI
    10.1109/RTAS.2012.13
  • Filename
    6200057