• DocumentCode
    2089846
  • Title

    Implementation of multiple-output functions using PQMDDs

  • Author

    Iguchi, Yoshinori ; Sasao, Tsutomu ; Matsuura, Motoharu

  • Author_Institution
    Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    199
  • Lastpage
    205
  • Abstract
    A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (shared reduced ordered Binary Decision Diagrams). In this paper, we propose PQMDD (Paged Quasi-reduced ordered Multi-valued Decision Diagram) as a new data structure. A function is represented by a PQMDD, and stored in memory. Dedicated control circuits traverse the PQMDD in parallel. We represent multiple-output function for benchmark functions by SBDDs and PQMDDs and compare the size of memory and computation time
  • Keywords
    decision diagrams; multivalued logic; sequential circuits; PQMDD; Paged Quasi-reduced ordered Multi-valued Decision Diagram; SBDDs; data structure; multiple-output logic functions; Aging; Binary decision diagrams; Boolean functions; Circuits; Data structures; Input variables; Logic functions; Microprocessors; Programmable logic arrays; Read only memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-0692-5
  • Type

    conf

  • DOI
    10.1109/ISMVL.2000.848620
  • Filename
    848620