Title :
A methodology for CMOS low noise amplifier design
Author :
Roa, Elkim ; Soares, João Navarro ; Van Noije, Wilhelmus
Author_Institution :
Integrable Syst. Lab., Sao Paulo Univ., Brazil
Abstract :
An intuitive strategy for CMOS low noise amplifier (LNA) design, compromising noise and linearity performance optimization, is presented. Analytical expressions for noise factor and IM3 are derived. The gain and power dissipation are considered pre-fixed parameters for this approach. A 2.4 GHz LNA has been designed and simulated in a 0.35 μm CMOS technology to validate the proposed methodology.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; circuit optimisation; circuit simulation; integrated circuit design; integrated circuit noise; intermodulation; linearisation techniques; 0.35 micron; 2.4 GHz; CMOS low noise amplifier; IM3; LNA design; linearity performance optimization; noise factor; noise performance optimization; CMOS technology; Circuit noise; Impedance matching; Linearity; Low-noise amplifiers; Noise figure; Optimized production technology; Performance gain; Power dissipation; Radio frequency;
Conference_Titel :
Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings. 16th Symposium on
Print_ISBN :
0-7695-2009-X
DOI :
10.1109/SBCCI.2003.1232800
