Title :
Silicon single-electron devices and their applications
Author :
Takahashi, Yasuo ; Fujiwara, Akira ; Ono, Yukinori ; Murase, Katsumi
Author_Institution :
NTT Basic Res. Labs., Atsugi, Japan
Abstract :
We have developed two novel methods of fabricating very small Si single-electron transistors (SETs), called PAttern-Dependent OXidation (PADOX) and Vertical PAttern-Dependent OXidation (V-PADOX). These methods exploit special phenomena that occur when small Si structures on SiO2 are thermally oxidized. Since the size of the resultant Si island of the SET is about 10 nm, we can observe the conductance oscillations in the SET even at room temperature. The controllability and reproducibility of these methods are excellent because of the stability of the thermal oxidation process. We are using PADOX and V-PADOX to integrate single-electron devices (SEDs)for sophisticated functions. We have fabricated and tested several kinds of memory and logic devices, This paper also describes applications of multi-input gate SETs to multiple-valued logic circuits
Keywords :
CMOS integrated circuits; CMOS logic circuits; single electron transistors; PADOX; Si structures; V-PADOX; Vertical PAttern-Dependent OXidation; conductance oscillations; multi-input gate SETs; multiple-valued logic circuits; single-electron transistors; Circuit stability; Circuit testing; Controllability; Oxidation; Reproducibility of results; Silicon; Single electron devices; Single electron transistors; Temperature; Thermal stability;
Conference_Titel :
Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
Conference_Location :
Portland, OR
Print_ISBN :
0-7695-0692-5
DOI :
10.1109/ISMVL.2000.848651