Enhancement of IBIS modeling capability in simutanous switching noise (SSN) and other power integrity related simulations - proposal, implementation, and validation

Author

Yang, Zhiping ; Huq, Syed ; Arumugham, Vinu ; Park, Ilyoung

Author_Institution

Cisco Syst., Inc., San Jose, CA

Volume

2

fYear

2005

fDate

12-12 Aug. 2005

Firstpage

672

Lastpage

677

Abstract

IBIS models are widely used in I/O related signal integrity simulations. This paper points out the problems with the present IBIS model in power integrity related simulations. A new proposal of adding some additional information to the existing IBIS standard to expand its capability in SSN and other power integrity related simulations are introduced. The processes to extract this information from transistor-level Spice model and implement the new proposal in existing IBIS tools are illustrated by using an example in HSPICE. The accuracy of the new proposed model is verified in simulations with nonideal power supply

Keywords

buffer circuits; circuit noise; switched mode power supplies; input-output buffer information specification; power integrity; simultaneous switching noise; switching noise; transistor-level Spice model; Circuit simulation; Clamps; Electronics industry; Integrated circuit noise; Logic circuits; Packaging; Power supplies; Power system modeling; Proposals; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility, 2005. EMC 2005. 2005 International Symposium on

Conference_Location

Chicago, IL

Print_ISBN

0-7803-9380-5

Type

conf

DOI

10.1109/ISEMC.2005.1513598

Filename

1513598