Optimum vertical design and evaluation techniques for high-current, high-voltage transistors

This paper discusses a quantitative design theory and new analysis techniques applicable to saturated switching power transistors. Methods for discriminating among various possible current-gain falloff mechanisms at high current densities are discussed in terms of easily measurable quantities allowing separation of the terminal currents in to physically meaningful components. The new analytical and experimental techniques presented allow rapidanalysis of any high current power transistor, allow characterization of various process sequences for their effects upon device performance, and allow optimal quantitative transistor design for a wide range of applications.