Power-Efficient High Throughput Reconfigurable Datapath Design for Portable Multimedia Devices

This paper presents new power efficient high throughput data paths for portable multimedia devices. The various data paths provide support for dense arithmetic operations. This work provides the performance evaluation for a library of reconfigurable data path elements (Processing Elements) previously proposed and presents two new processing element architectures to be part of power efficient portable, multimedia processing systems. The performance results show that the proposed designs will provide a higher efficiency in power and area consumption compared to the previously suggested and commercial solutions, and could prove highly beneficial for the target domain of multimedia operations on portable systems.