• DocumentCode
    2103117
  • Title

    Variability mitigation using correction function technique

  • Author

    Agwa, Shady ; Yahya, Eslam ; Ismail, Yousr

  • Author_Institution
    Center of Nanoelectron. & Devices (CND), American Univ. in Cairo, Cairo, Egypt
  • fYear
    2013
  • fDate
    8-11 Dec. 2013
  • Firstpage
    293
  • Lastpage
    296
  • Abstract
    As the fabrication technology migrates towards nanometer scale; the timing constraints of sequential circuits have become more critical. Process voltage and temperature variations (PVT) increase the unreliability of the sequential circuits. There are different techniques to tolerate the variability and to mitigate the critical timing of the sequential circuits. Traditional techniques using clock skewing or soft-edge flipflop relax the timing conditions by stealing time from adjacent stages. In contrast to traditional techniques using correction function technique can give an indication about the error rate which is useful to re-adjust the supply voltage or the operating frequency. The correction function technique is able to detect the error of one of the 4×4 bit multiplier´s inputs and correct the output data without flushing the pipeline stages with 1.459x overhead of area and 1.427x overhead of power.
  • Keywords
    flip-flops; nanoelectronics; sequential circuits; clock skewing; correction function technique; error rate; operating frequency; pipeline stages; process voltage; sequential circuits; soft-edge flipflop; supply voltage; temperature variations; timing conditions; timing constraints; variability mitigation; word length 4 bit; Adders; Clocks; Delays; Flip-flops; Latches; Pipelines; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
  • Conference_Location
    Abu Dhabi
  • Type

    conf

  • DOI
    10.1109/ICECS.2013.6815412
  • Filename
    6815412