DocumentCode :
2103736
Title :
Novel application of FIB lift-out and ultramicrotomy for advanced package failure analysis
Author :
Mohammad, K.N. ; Sim, K.S.
Author_Institution :
Intel Technol. Sdn. Bhd., Penang, Malaysia
fYear :
2002
fDate :
2002
Firstpage :
159
Lastpage :
163
Abstract :
The semiconductor industry is pushing the technology envelope of integrated circuit packaging: aggressively shrinking the geometry and introducing cost competitive materials and processing technology. The need for more powerful package FA techniques also increases, especially in the area of higher resolution imaging and material characterization. The field emission SEM no longer has the spatial resolution needed to image thin film interfaces found in new generation packages. Hence, TEM was called into action, especially in analyzing thin interfaces such as the solder joint interface and copper via interface. The sample preparation technique for package FA is the gating factor for TEM analysis. The conventional TEM preparation techniques such as wedge and dimpling are not compatible with the advanced packaging materials. The FIB cross-section technique is applicable but typically takes a long time to prepare by trimming to the region of interest (ROI) and then polishing to a 20 μm sliver. There is a great need for effective TEM sample preparation techniques to make TEM available to package failure analysis. FIB lift-out and ultramicrotomy techniques have been improvised to meet this need.
Keywords :
failure analysis; focused ion beam technology; integrated circuit packaging; integrated circuit testing; specimen preparation; transmission electron microscopy; 20 micron; Cu; FIB cross-section technique; FIB lift-out; TEM; TEM preparation techniques; copper via interface; cost competitive materials; cost competitive processing technology; field emission SEM; gating factor; imaging resolution; integrated circuit packaging; material characterization; package FA techniques; package failure analysis; package geometry; region of interest; sample preparation technique; semiconductor industry; solder joint interface; spatial resolution; thin film interfaces; ultramicrotomy; Costs; Electronics industry; Failure analysis; Geometry; Image resolution; Integrated circuit packaging; Integrated circuit technology; Semiconductor device packaging; Semiconductor materials; Spatial resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2002. IPFA 2002. Proceedings of the 9th International Symposium on the
Print_ISBN :
0-7803-7416-9
Type :
conf
DOI :
10.1109/IPFA.2002.1025638
Filename :
1025638
Link To Document :
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