Design of a current steering DAC for a high speed current mode SAR ADC

In this paper, an approach towards high speed current mode based SAR ADCs is presented. The main focus is placed on the design of a unary single-sided current steering DAC working with a binary search algorithm inside the SAR loop. Reflecting the fact that current source matching and precise current settling are the most important static and dynamic properties of the current steering DAC in a current based SAR ADC, the paper contains an initial investigation of the DAC current settling when driving a linear load together with an analysis of the effects of current source mismatch and noise on the DAC performance. The theoretical analysis is compared against a schematic level implementation in a 1.2V 90nm CMOS technology. This DAC implementation is designed for an overall resolution of 10bit in the current based SAR ADC over a Nyquist band from DC to 100MHz.