DocumentCode
2104599
Title
8Gb/s differential simultaneous bidirectional link with 4mV 9ps waveform capture diagnostic capability
Author
Martin, A. ; Casper, B. ; Kennedy, J. ; Jaussi, J. ; Mooney, R.
Author_Institution
Intel Labs., Hillsboro, OR, USA
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
78
Abstract
Differential simultaneous bidirectional I/O circuits in 0.18 /spl mu/m CMOS operate up to 8 Gb/s with BER better than 10/sup -11/ using 32 b LFSR. The cell area is 0.13 mm/sup 2/ and the dissipation is 120 mW. On-die diagnostic measurement of individual I/O link performance is enabled with a variable offset comparator and clock phase interpolator with resolution of 4 mV and 9 ps.
Keywords
CMOS digital integrated circuits; comparators (circuits); delay lock loops; interpolation; synchronisation; transceivers; 0.18 /spl mu/m CMOS; 0.18 micron; 120 mW; 8 Gbit/s; BER; I/O link performance; LFSR; cell area; clock phase interpolator; delay-locked loop; differential interface; differential simultaneous bidirectional I/O circuits; on-die diagnostic measurement; power dissipation; transceiver architecture; variable offset comparator; waveform capture diagnostic capability; Clocks; Delay; Differential amplifiers; Driver circuits; Filters; Impedance; Power supplies; Timing; Transmitters; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234215
Filename
1234215
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