DocumentCode
2104666
Title
System-level exploration with SpecSyn
Author
Gajski, Daniel D. ; Vahid, Frank ; Narayan, Sanjiv ; Gong, Jie
Author_Institution
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear
1998
fDate
19-19 June 1998
Firstpage
812
Lastpage
817
Abstract
We present the SpecSyn system-level design environment supporting the specify-explore-refine (SER) design paradigm. This three-step approach includes precise specification of system functionality, rapid exploration of numerous system-level design options, and refinement of the specification into one reflecting the chosen option. A system-level design option consists of an allocation of system, components like standard and custom processors, and a partitioning of functionality among those components. Focusing on SpecSyn´s exploration techniques, we emphasize its two-phase estimation approach and highlight experiments using SpecSyn.
Keywords
formal specification; high level synthesis; systems analysis; SpecSyn; system functionality; system-level design; system-level design environment; two-phase estimation; Automatic control; Computational modeling; Computer architecture; Computer science; Hardware; Permission; Processor scheduling; Software standards; System-level design; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1998. Proceedings
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-89791-964-5
Type
conf
Filename
724583
Link To Document