A frequency synthesizer based on Zero-Crossing Digital Phaselocked Loop

This paper presents an efficient hybrid frequency synthesizer, that is capable of both integer and fractional division, design based on the Zero-Crossing Digital Phase-locked Loop architecture. The design uses an efficient adaptation mechanism to maintain the in-lock state following the division process. The fast switching, locking and acquisition of the system make it an excellent candidate for synthesis even in Doppler environment. The simulation results demonstrate that the proposed synthesizer can achieve the desired frequency division.