Modeling and simulation of quantizer and DAC nonidealities of a continuous time ΔΣ modulator

This paper gives an insight into excess loop delay and clock jitter effects, which lead to performance degradation in continuous time delta sigma modulators. A new method for straight forward calculation of excess loop delay compensated coefficients is shown regarding a multibit quantizer and DAC output. Also a close look at the input signal dependent quantizer activity is given, which allows a derivation of the influence of the clock jitter related deterioration of the feedback signal on the performance of the modulator.