DocumentCode :
2114293
Title :
Implementation design of pulse coded neural network neuron into field programmable gate array device
Author :
Sevcik, Peter
Author_Institution :
Univ. of Zilina, Zilina
fYear :
2006
fDate :
6-7 Sept. 2006
Firstpage :
197
Lastpage :
200
Abstract :
This paper presents implementation design of pulse coded neural network neuron. This implementation is targeted for filed programmable gate array (FPGA) device. Comparison between this FPGA implementation and the Matlab model is presented in the end of paper.
Keywords :
field programmable gate arrays; neural nets; FPGA; Matlab model; field programmable gate array device; filed programmable applied gate array device; pulse coded neural network neuron; Biological system modeling; Brain modeling; Equations; Field programmable gate arrays; Joining processes; Mathematical model; Neural networks; Neurons; Pixel; Pulse generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Electronics, 2006. AE 2006. International Conference on
Conference_Location :
Pilsen
Print_ISBN :
80-7043-442-2
Type :
conf
DOI :
10.1109/AE.2006.4382998
Filename :
4382998
Link To Document :
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