Grid synchronization PLL robust to frequency variation, unbalanced and distorted voltage

In this paper, Grid synchronization Phase Locked Loop (PLL) robust to frequency Variation, unbalanced and distorted voltage is proposed. The proposed PLL is based on a decoupling network in a synchronous reference frame and uses Second dq transformation Memory Phase Delay (SMPD). For the connection of grid, a fast, robust and precise phase angle detector is most important to grid synchronization and the active power control. The phase angle can be well estimated by synchronous dq PLL system. But conventional synchronous dq PLL system has problem that generate a second-order harmonic component because of the effect of the negative sequence components The proposed SMPD is applied to establish the positive sequence component under unbalanced as well as distorted grid voltage. Furthermore, the proposed PLL shows a robust phase tracking capability even in the grid frequency variation. Simulation and experimental results are presented to verify the proposed method under several kinds of grid voltage conditions.