A SPICE analysis on how PDNs can benefit from Crosstalk Avoidance Code

In order to improve Signal Integrity (SI) in parallel data busses physical techniques are used. However, the physical techniques have the disadvantage that affect the component placing resulting in an increase of the Printed Circuit Board (PCB) size. A solution is to code the sent information, so that a Forbidden Transition Channel (FTC) is created, [1]. When it comes to parallel data transmission, not only a SI-analysis, but Power Integrity (PI) analysis is also important. Through such a PI-analysis is possible to determine the voltage fluctuations that might appear because of the switching patterns of the drivers given by the Integrated Circuit (IC) power demands [3]. In the following paper, a SI/PI-analysis is done to determine if by coding the information prevents high voltage ripple on the voltage rail.