Title :
An algorithm for array variable clustering
Author :
Ramachandran, Loganath ; Gajski, Daniel D. ; Chaiyakul, Viraphol
Author_Institution :
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fDate :
28 Feb-3 Mar 1994
Abstract :
During synthesis of behavioral descriptions array variables are implemented with memory modules. In this paper we show that simple one-to-one mapping between the array variables and the memory modules lead to inefficient designs. We propose a new algorithm, MeSA, which computes for a given set of array variables, (a) the number of memory modules, (b) the size of each module (c) the number of ports on each module and (d) and the grouping of array variables assigned to each memory module. The effects of address translations are incorporated into the algorithm. While most previous research efforts have concentrated on scalar variables, the primary focus in this paper is deriving efficient storage assignment for array variables
Keywords :
logic CAD; storage allocation; storage management; MeSA algorithm; Memory Synthesis Algorithm; address translations; array variable clustering; behavioral descriptions; differential heat release computation; efficient storage assignment; high level synthesis; memory access flexibility table; memory modules; Adders; Art; Clustering algorithms; Computer science; Costs; Hardware; High level synthesis; Random access memory; Registers; Storage automation;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326867