Hardware design of data acquisition and processing of digital IF receiver

Author

Zhou, Gang ; Wu, Jie

Author_Institution

Dept. of Electr. Eng., Henan Univ. of Technol., Zhengzhou, China

fYear

2012

fDate

21-23 April 2012

Firstpage

2613

Lastpage

2615

Abstract

The intermediate frequency (IF) signal solution hardware scheme of software defined radio which based on DDC and DSP is formulated. Signal conditioning circuit composed of OPA842 and AD8138 ensures the analog input to ADC AD6644 is differential and low noise. In design DDC HSP50214B realizes frequency conversion and rate conversion, it lowers the sampling rate and filters the signal to process for following. The buffer of data transmission between DDC and DSP is composed of two FIFOs. According to the structure of hardware the mode of data transmission and access timing of FIFO are analyzed.

Keywords

analogue-digital conversion; data acquisition; digital filters; digital signal processing chips; signal conditioning circuits; software radio; AD8138; ADC AD6644; DDC HSP50214B; DSP; FIFO; OPA842; analog-to-digital converter; data acquisition; data processing; data transmission; digital IF receiver; filters; frequency conversion; hardware design; intermediate frequency signal solution hardware scheme; rate conversion; sampling rate; signal conditioning circuit; software defined radio; Clocks; Data communication; Digital signal processing; Frequency conversion; Random access memory; Receivers; Timing; DDC; FIFO; IF receiver; data acquisition;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on

Conference_Location

Yichang

Print_ISBN

978-1-4577-1414-6

Type

conf

DOI

10.1109/CECNet.2012.6202053

Filename

6202053