Model of integrated micro photovoltaic cell structures for harvesting supplied microsystems in 0.35-µm CMOS technology

In this paper we present a micro photovoltaic cell model, validated by the experimental results obtained from a test chip realized in 0.35-μm CMOS technology. In particular, we analyzed and modeled the behavior of an integrated p-n junction when irradiated with incident light with solar spectrum, considering the parameters of a conventional 0.35-μm CMOS technology. We considered the effect of irradiation on the basic diode equation, which allows the estimation of the carrier photo-generation as a function of the geometrical parameters of the micro photovoltaic cell. This model is particularly useful to predict the available harvested power that can be delivered to an on-chip integrated microsystem. Based on the proposed model, we also developed an equivalent circuit of the micro photovoltaic cells, that can be used with circuit simulators to evaluate the performance of complete microsystems. The test chip realized to validate the model consists of a set of different integrated micro photovoltaic cells.