Title :
A High-Rate MIMO Receiver in an FPGA
Author :
Pinho, Pedro ; Véstias, Mário
Author_Institution :
Inst. de Telecomun., Aveiro, Portugal
Abstract :
This paper describes the hardware implementation of a High-Rate MIMO Receiver in an FPGA for three modulations, namely BPSK, QPSK and 16-QAM based on the Alamouti scheme. The implementation with 16-QAM achieves more than 1.6 Gbps with 66% of the resources of a medium-sized Virtex-4 FPGA. This results indicate that the Alamouti scheme is a good design option for hardware implementation of a high-rate MIMO receiver. Also, using an FPGA, the modulation can be dynamically changed on demand.
Keywords :
MIMO communication; field programmable gate arrays; quadrature amplitude modulation; quadrature phase shift keying; radio receivers; 16-QAM; Alamouti scheme; BPSK; QPSK; high-rate MIMO receiver; medium-sized Virtex-4 FPGA; Field programmable gate arrays; Hardware; MIMO; Modulation; Receiving antennas; Transmitting antennas;
Conference_Titel :
Antennas and Propagation Society International Symposium (APSURSI), 2012 IEEE
Conference_Location :
Chicago, IL
Print_ISBN :
978-1-4673-0461-0
DOI :
10.1109/APS.2012.6348078
