DocumentCode :
2135528
Title :
Some image processing algorithms on a RAP with wider bus networks
Author :
Lee, Shung-Shing ; Horng, Shi-Jinn ; Tsai, Horng-Ren ; Lee, Yu-Hua
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
fYear :
1996
fDate :
15-19 Apr 1996
Firstpage :
708
Lastpage :
715
Abstract :
Based on the reconfigurable array of processors with wider bus networks (Li et al., 1995), we propose a series of algorithms for image processing. Conventionally, only one bus is connected between two processors but in this machine it has a set of buses. Such a characteristic increases the computation power of this machine greatly. Based on the base-m number system, we first introduce some basic operation algorithms. Then three related applications are derived in constant time; one is the histogram of an image, another is the image segmentation and the other is the image labeling
Keywords :
image processing; image segmentation; multiprocessor interconnection networks; parallel algorithms; parallel architectures; reconfigurable architectures; system buses; RAP; base-m number system; computation power; constant time; histogram; image labeling; image processing algorithms; image segmentation; parallel algorithms; reconfigurable array of processors; wider bus networks; Bandwidth; Computer architecture; Concurrent computing; Entropy; Histograms; Image processing; Image segmentation; Labeling; Parallel processing; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1996., Proceedings of IPPS '96, The 10th International
Conference_Location :
Honolulu, HI
Print_ISBN :
0-8186-7255-2
Type :
conf
DOI :
10.1109/IPPS.1996.508136
Filename :
508136
Link To Document :
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