Title :
Impact of Enabling solution design on SLI reliability during Temperature Cycling using Shadow Moire
Author :
Meyyappan, Karumbu ; Geng, Phil ; Hsu, Ife
Author_Institution :
Intel Corp., Hillsboro, OR
fDate :
May 30 2006-June 2 2006
Abstract :
The enabling solutions used in today´s computer systems commonly apply some amount of preload on the socket/package. This load plays a critical role in modulating the reliability performance of the second level interconnects (SLI). The load manifests itself as a board warpage that can be quantified using techniques such as board level shadow moire (BLSM). This paper describes specifically the use of board level shadow moire as a viable and insightful technique for measuring the board warpage induced by a socket to enabling solution (ES) interaction. This paper also outlines thermal cycling experiments that have been conducted to study the impact of enabling solution on the thermal cycling performance. The empirical data from these thermal cycling experiments will be used to establish correlation to the areas of high curvature indicated by BLSM; Hence, validating its benefits
Keywords :
assembling; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; materials testing; printed circuits; board level shadow moire; reliability; second level interconnects; solder joint; thermal cycling; Electronics packaging; Integrated circuit interconnections; Residual stresses; Semiconductor device packaging; Sockets; Soldering; Substrates; Temperature; Thermal conductivity; Thermal expansion;
Conference_Titel :
Thermal and Thermomechanical Phenomena in Electronics Systems, 2006. ITHERM '06. The Tenth Intersociety Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-9524-7
DOI :
10.1109/ITHERM.2006.1645446