Circuit aging simulator (CAS)

Author

Lee, P.M. ; Kuo, M.M. ; Seki, K. ; Lo, P.K. ; Hu, C.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

1988

fDate

11-14 Dec. 1988

Firstpage

134

Lastpage

137

Abstract

A circuit aging simulator (CAS) has been developed as part of the BSIM (Berkeley Short-channel Igfet Model) family to predict the effects of hot-electron degradation on MOS circuit behavior. Using the SPICE2 of SPICE 3 circuit simulator in a UNIX environment, CAS simulates circuit behavior at a user-specified future time using fresh and DC prestressed BSIM parameter process files. CAS is configured in a pre- and postprocessor configuration, so that no modifications to the SPICE code are necessary. Iterative simulation to take into account ongoing degradation can also be done through an accompanying UNIX shell scrip program.<>

Keywords

MOS integrated circuits; circuit analysis computing; hot carriers; integrated circuit testing; Berkeley short channel IGFET model; CAS; MOS circuit behavior; SPICE 3; SPICE2; UNIX environment; UNIX shell scrip program; circuit aging simulator; hot-electron degradation; iterative simulation; postprocessor configuration; preprocessor configuration; Aging; Artificial intelligence; Circuit simulation; Computational modeling; Computer simulation; Content addressable storage; Degradation; Predictive models; Tiles; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1988.32771

Filename

32771