DocumentCode
2144396
Title
Coprocessor design space exploration using high level synthesis
Author
Lakshminarayana, Avinash ; Ahuja, Sumit ; Shukla, Sandeep
Author_Institution
FERMAT Lab., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear
2010
fDate
22-24 March 2010
Firstpage
879
Lastpage
884
Abstract
Hardware/software co-design has been an area of research for a few decades. Currently co-design is utilized to create hardware coprocessors for compute intensive tasks of a system (which otherwise, performed in software, will not meet the performance goals). Design of correct hardware coprocessors with area, timing and power constraints is a time consuming task. In this paper, we present a methodology to alleviate this problem up to a certain extent. First, we show how to adopt a high-level synthesis tool in design space exploration to converge towards efficient hardware coprocessors. Second, we show, through a series of case studies that, a system-level approach, keeping platform specific optimizations in mind, can help in doing such an exploration efficiently.
Keywords
coprocessors; hardware-software codesign; area constraint; coprocessor design; design space; hardware coprocessors; hardware-software codesign; high level synthesis; power constraint; system-level approach; timing constraint; Coprocessors; Cryptography; Field programmable gate arrays; Filters; Hardware; High level synthesis; Military computing; Performance analysis; Programming; Space exploration;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2010 11th International Symposium on
Conference_Location
San Jose, CA
ISSN
1948-3287
Print_ISBN
978-1-4244-6454-8
Type
conf
DOI
10.1109/ISQED.2010.5450474
Filename
5450474
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