DocumentCode :
2144585
Title :
A pipelined systolic architecture for 2-D discrete Fourier transform
Author :
Wang, L. ; Hartimo, I.
Author_Institution :
Helsinki Univ. of Technol., Espoo, Finland
Volume :
3
fYear :
1993
fDate :
19-21 Oct. 1993
Firstpage :
528
Abstract :
A new systolic preprocessor is proposed for the two-dimensional discrete Fourier transform (2-D DFT) using an even-odd decomposition algorithm. According to the even-odd decomposition algorithm, a 16-point systolic preprocessor is created for a direct square 2-D DFT implementation. So, the square postprocessor is decreased by a 16 in size and therefore it is very suitable for large 2-D DFTs. The entire architecture is connected in a full pipeline and the pre- and postprocessors can be run simultaneously.<>
Keywords :
fast Fourier transforms; pipeline processing; program processors; signal processing; systolic arrays; 2D discrete Fourier transform; even-odd decomposition algorithm; pipelined systolic architecture; preprocessors; square postprocessor; Digital filters; Digital signal processing; Discrete Fourier transforms; Discrete transforms; Frequency domain analysis; Hardware; Pipeline processing; Signal processing algorithms; Spectral analysis; Systolic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location :
Beijing, China
Print_ISBN :
0-7803-1233-3
Type :
conf
DOI :
10.1109/TENCON.1993.328042
Filename :
328042
Link To Document :
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