Methodology to ensure circuit robustness and exceptional silicon quality while proliferating designs across process revisions with high productivity

This paper describes methodologies developed to ensure circuit robustness and silicon quality when a high performance microprocessor design is proliferated across process revisions. The paper describes innovative techniques and solutions based on data obtained from post silicon experiments and simulations that can be advantageous to the designers. The paper focuses on the areas of leakage control, noise tolerance, min-delay analysis.