DocumentCode
2149092
Title
On the use of GP-GPUs for accelerating compute-intensive EDA applications
Author
Bertacco, Valeria ; Chatterjee, Debapriya ; Bombieri, Nicola ; Fummi, Franco ; Vinco, Sara ; Kaushik, A.M. ; Patel, Hiren D.
Author_Institution
EECS Department, University of Michigan, USA
fYear
2013
fDate
18-22 March 2013
Firstpage
1357
Lastpage
1366
Abstract
General purpose graphics processing units (GP-GPUs) have recently been explored as a new computing paradigm for accelerating compute-intensive EDA applications. Such massively parallel architectures have been applied in accelerating the simulation of digital designs during several phases of their development - corresponding to different abstraction levels, specifically: (i) gate-level netlist descriptions, (ii) register-transfer level and (iii) transaction-level descriptions. This embedded tutorial presents a comprehensive analysis of the best results obtained by adopting GP-GPUs in all these EDA applications.
Keywords
Acceleration; Computational modeling; Computer architecture; Graphics processing units; Instruction sets; Logic gates; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
Conference_Location
Grenoble, France
ISSN
1530-1591
Print_ISBN
978-1-4673-5071-6
Type
conf
DOI
10.7873/DATE.2013.279
Filename
6513725
Link To Document