DocumentCode
2149291
Title
GLA: Gate-level abstraction revisited
Author
Mishchenko, Alan ; Een, Niklas ; Brayton, Robert ; Baumgartner, Jason ; Mony, Hari ; Nalla, Pradeep
Author_Institution
Department of EECS, University of California, Berkeley, USA
fYear
2013
fDate
18-22 March 2013
Firstpage
1399
Lastpage
1404
Abstract
Verification benefits from removing logic that is not relevant for a proof. Techniques for doing this are known as localization abstraction. Abstraction is often performed by selecting a subset of gates to be included in the abstracted model; the signals feeding into this subset become unconstrained cut-points. In this paper, we propose several improvements to substantially increase the scalability of automated abstraction. In particular, we show how a better integration between the BMC engine and the SAT solver is achieved, resulting in a new hybrid abstraction engine, that is faster and uses less memory. This engine speeds up computation by constant propagation and circuit-based structural hashing while collecting UNSAT cores for the intermediate proofs in terms of a subset of the original variables. Experimental results show improvements in the abstraction depth and size.
Keywords
Boolean functions; Data structures; Engines; Logic gates; Memory management; Model checking; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
Conference_Location
Grenoble, France
ISSN
1530-1591
Print_ISBN
978-1-4673-5071-6
Type
conf
DOI
10.7873/DATE.2013.286
Filename
6513732
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