A new half-micron p-channel MOSFET with LATIPS (large-tilt-angle implanted punchthrough stopper)

A novel half-micron buried p-MOSFET with a large-tilt-angle-implanted punchthrough stopper (LATIPS) is proposed. The n/sup +/ LATIPs region is successfully realized adjacent to the p/sup +/ source/drain, even without a sidewall spacer, by taking advantage of the n/sup +/ large-tilt-angle implant. In spite of the relatively deep p/sup +/ junction of 0.2- mu m depth and the low n-well concentration of 1*10/sup 16/ cm/sup -3/, the 0.5- mu m LATIPS device achieves high punchthrough resistance, e.g. a low subthreshold swing of 95 mV/dec, with a high transconductance of 135 mS/mm and small body effect. The submicron LATIPS device also achieves improved resistance to hot-electron-induced punchthrough as compared with the conventional device. The LATIPS technique is most promising for half-micron CMOS (complementary MOS) ULSIs (ultra-large-scale integrated circuits).<>