• DocumentCode
    2154159
  • Title

    Reconfigurable IDCT architecture on FPGA for multiple video standards

  • Author

    Swaminathan, Karthik ; Kumar, J.Vinoth

  • Author_Institution
    Department of Electronics and Communication Engineering J.J. College of Engineering and Technology, Tiruchirappalli, Tamilnadu, India
  • fYear
    2012
  • fDate
    13-14 Dec. 2012
  • Firstpage
    264
  • Lastpage
    268
  • Abstract
    In this brief, a reconfigurable IDCT architecture is designed for multistandard inverse transform. The proposed architecture is used in multistandard decoder of MPEG-2, MPEG-4 ASP, H.264/AVC and VC-l. Two circuits share strategies, factor share (FS) and adder share (AS), are applied to the inverse transform architecture for saving its circuit resource.
  • Keywords
    Circuit share; IDCT; high-definition video; multi-standard; multistandard inverse transform; reconfigurable architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Emerging Trends in Science, Engineering and Technology (INCOSET), 2012 International Conference on
  • Conference_Location
    Tiruchirappalli, Tamilnadu, India
  • Print_ISBN
    978-1-4673-5141-6
  • Type

    conf

  • DOI
    10.1109/INCOSET.2012.6513916
  • Filename
    6513916
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2154159