DocumentCode
2154361
Title
A programmable security processor for cryptography algorithms
Author
Lin Han ; Han, Lin ; Zeng, Xiaoyang ; Lu, Ronghua ; Zhao, Jia
Author_Institution
State-Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
2144
Lastpage
2147
Abstract
A novel programmable security processor for cryptography algorithms is presented in this paper. The 16-bit length RISC-like instruction set and 3-stage pipeline provide low code density, low hardware cost and low power consumption. Parallel on-chip lookup tables are integrated to obtain satisfactory performance of cryptographic processing. Chinese wireless local area network block cipher standard-SMS4 and NIST encryption standard-AES are implemented in this processor, and it is the first implementation of SMS4 based on a domain specific programmable processor. To resist external attack on memories, a method for secure storage of round key is also proposed.
Keywords
cryptography; microprocessor chips; programmable circuits; table lookup; wireless LAN; Chinese wireless local area network; cryptographic processing; cryptography algorithms; encryption; parallel on-chip lookup tables; programmable security processor; wireless local area network block cipher; Costs; Cryptography; Energy consumption; Hardware; NIST; Pipelines; Resists; Security; Table lookup; Wireless LAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734992
Filename
4734992
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