DocumentCode :
2155210
Title :
Interconnect capacitance characterization based on charge based capacitance measurement (CBCM) technique for DFM applications
Author :
Zhang, Yonghong ; Tang, Haixia ; Gao, Panpan ; Cheng, Yuhua
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
2280
Lastpage :
2283
Abstract :
Interconnection parasitic capacitance is the dominant delay and noise source in modern integrated circuits. This paper presents a test structure and a characterization method based on charge based capacitance measurement technique. The method could be implemented to study the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction, which can in turn be used in process/device modeling for design-for-manufacturing applications.
Keywords :
capacitance measurement; design for manufacture; integrated circuit design; integrated circuit interconnections; integrated circuit manufacture; integrated circuit measurement; integrated circuit modelling; integrated circuit noise; integrated circuit testing; CBCM technique; DFM applications; charge based capacitance measurement technique; circuit test structure; design-for-manufacturing applications; integrated circuit delay; integrated circuit noise; interconnect capacitance characterization; process/device modeling; Capacitance measurement; Circuit testing; Coupling circuits; Crosstalk; Delay; Design for manufacture; Integrated circuit interconnections; Integrated circuit noise; Parasitic capacitance; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4735025
Filename :
4735025
Link To Document :
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