Title :
A systolic array for 2-D DFT and 2-D DCT
Author :
Lim, Hyesook ; Swartzlander, Earl E., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
A new approach for computing the 2-D DFT (discrete Fourier transform) and 2-D DCT (discrete cosine transform) is presented. A new design of a systolic array for transposed matrix multiplication is also shown in this paper. The new 2-D DFT/DCT avoids the need for the array transposer that was required by earlier implementations, and all processing can be pipelined easily. This approach employs a simple and regular structure that is well suited for VLSI implementation. This array can be easily scaled without modifying the basic control scheme and PE structure
Keywords :
VLSI; discrete cosine transforms; fast Fourier transforms; matrix algebra; pipeline processing; systolic arrays; 2D DCT; 2D DFT; PE structure; VLSI implementation; array transposer; basic control scheme; pipelined processing; systolic array; transposed matrix multiplication; two dimensional discrete Fourier transform; two dimensional discrete cosine transform; Discrete Fourier transforms; Discrete cosine transforms; Fast Fourier transforms; Pipeline processing; Registers; Signal processing; Signal processing algorithms; Systolic arrays; Two dimensional displays; Very large scale integration;
Conference_Titel :
Application Specific Array Processors, 1994. Proceedings. International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-8186-6517-3
DOI :
10.1109/ASAP.1994.331810
