Title :
EsteMate: a tool for automated power and area estimation in analog top-down design and synthesis
Author :
Van der Plas, G. ; Vandenbussche, J. ; Gielen, G. ; Sansen, W.
Author_Institution :
Dept. of Electr. Eng., Katholieke Univ., Leuven, Heverlee, Belgium
Abstract :
A novel methodology to derive power and area is presented. The method consists of the generation of a training set and a subsequent training of an Artificial Neural Network. The resulting estimators do not only predict power and area accurately and efficiently, they also reflect the complex interaction between different specifications. The method has been implemented in a tool, EsteMate, and is illustrated with practical examples
Keywords :
analogue integrated circuits; circuit CAD; integrated circuit design; neural nets; parameter estimation; EsteMate tool; analog top-down design; area estimation; artificial neural network; power estimation; training; Artificial neural networks; Circuit synthesis; Complexity theory; Digital systems; Electronic design automation and methodology; Energy consumption; Network synthesis; Programmable logic arrays; Signal synthesis; System-level design;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606602
