Title :
High quality La/sub 2/O/sub 3/ and Al/sub 2/O/sub 3/ gate dielectrics with equivalent oxide thickness 5-10 /spl Aring/
Author :
Chin, A. ; Wu, Y.H. ; Chen, S.B. ; Liao, C.C. ; Chen, W.J.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
High quality La/sub 2/O/sub 3/ and Al/sub 2/O/sub 3/ are fabricated with EOT of 4.8 and 9.6 /spl Aring/, leakage current of 0.06 and 0.4 A/cm/sup -2/ and D/sub it/ of both 3/spl times/10/sup 10/ eV/sup -1//cm/sup 2/, respectively. The high K is further evidenced from high MOSFET´s I/sub d/ and g/sub m/ with low I/sub OFF/. Good SILC and Q/sub BD/ are obtained and comparable with SiO/sub 2/. The low EOT is due to the high thermodynamic stability in contact with Si and stable after H/sub 2/ annealing up to 550/spl deg/C.
Keywords :
MOSFET; alumina; annealing; dielectric thin films; electric breakdown; interface states; lanthanum compounds; leakage currents; permittivity; 550 C; Al/sub 2/O/sub 3/; H/sub 2/ annealing; La/sub 2/O/sub 3/; MOSFET; charge-to-breakdown; equivalent oxide thickness; interface trap density; leakage current; permittivity; stress induced leakage current; thermodynamic stability; ultrathin gate dielectric; Amorphous materials; Annealing; Artificial intelligence; Crystallization; Dielectric measurements; High K dielectric materials; High-K gate dielectrics; Leakage current; Temperature; Thermal stability;
Conference_Titel :
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6305-1
DOI :
10.1109/VLSIT.2000.852751
