Title :
On the automatic generation of GPU-oriented software applications from RTL IPs
Author :
Bombieri, Nicola ; Fummi, F. ; Vinco, S.
Author_Institution :
Dipt. di Inf., Univ. di Verona, Verona, Italy
fDate :
Sept. 29 2013-Oct. 4 2013
Abstract :
Graphics processing units (GPUs) have been explored as a new computing paradigm for accelerating computation intensive applications. In particular, the combination between GPUs and CPU has proved to be an effective solution for accelerating the software execution, by mixing the few CPU cores optimized for serial processing with many smaller GPU cores designed for massively parallel computations. In addition, sustained by the need of low power consumption besides high performance, a recent trend is combining GPUs and CPU onto a single die (e.g., AMD Fusion, Intel Sandy Bridge, NVIDIA Tegra). The good tradeoff between computing capability and power consumption makes the integrated GPUs a promising alternative for accelerating a wide range of software application for embedded systems. Nevertheless, algorithms must be redesigned to take advantage of these architectures and such a manual parallelization often results in being unsatisfactory. This paper presents a methodology to automatically generate software applications for GPUs, by reusing existing and preverified register-transfer level (RTL) intellectual-properties (IPs). The methodology aims at exploiting the intrinsic parallelism of RTL IPs (such as process concurrency and pipeline micro-architecture) for generating the parallel software implementation of the functionality. The experimental results show how the performance obtained by running the RTL functionality as software applications on GPUs outperform those provided by the RTL code mapped into a hardware accelerator.
Keywords :
embedded systems; graphics processing units; integrated circuit design; multiprocessing systems; software engineering; AMD Fusion; CPU cores; GPU cores; Intel Sandy Bridge; NVIDIA Tegra; RTL IP; RTL code; automatic GPU-oriented software application generation; computation intensive application acceleration; computing capability; computing paradigm; graphics processing units; hardware accelerator; parallel computations; pipeline microarchitecture; power consumption; process concurrency; register-transfer level intellectual-properties; serial processing; software execution; Computer architecture; Graphics processing units; IP networks; Instruction sets; Parallel processing; Pipelines; APU; GP-GPU processing; HW to SW migration; OpenCL; SW generation;
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2013 International Conference on
Conference_Location :
Montreal, QC
DOI :
10.1109/CODES-ISSS.2013.6658999