A low power, low noise, ultra-wide dynamic range CMOS imager with pixel-parallel A/D conversion

Author

Mellrath, L.G.

Author_Institution

MIT, Cambridge, MA, USA

fYear

2000

fDate

15-17 June 2000

Firstpage

24

Lastpage

27

Abstract

A CMOS image sensor with pixel-parallel A/D conversion fabricated with different array sizes and photodiode types in a 3-metal 0.5 /spl mu/m process is presented. Nominal power dissipation is 40 nW per pixel at V/sub DD/=3.3 V. A/D conversion results from sampling a free-running photocurrent-controlled oscillator to give a first-order /spl Sigma/-/spl Delta/ sequence. The sensor displays dynamic range capability of greater than 150000:1 and exhibits fixed pattern noise correctable to within 0.1% of signal.

Keywords

Arrays; CMOS image sensors; Integrated circuit noise; Low-power electronics; Photodiodes; Sigma-delta modulation; 0.5 micron; 3-metal CMOS process; 3.3 V; 40 nW; A/D conversion; CMOS image sensor; array sizes; dynamic range capability; first-order /spl Sigma/-/spl Delta/ sequence; fixed pattern noise; free-running photocurrent-controlled oscillator; low noise operation; low power operation; photodiode types; pixel-parallel ADC; sigma-delta convertor; ultra-wide dynamic range imager; CMOS image sensors; Dynamic range; Image converters; Image sampling; Oscillators; Photodiodes; Pixel; Power dissipation; Sensor arrays; Signal sampling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-6309-4

Type

conf

DOI

10.1109/VLSIC.2000.852841

Filename

852841