Title :
Robust 130 mn-node Cu dual damascene technology with low-k barrier SiCN
Author :
Aoki, H. ; Torii, K. ; Oshima, T. ; Noguchi, J. ; Tanaka, U. ; Yamaguchi, H. ; Saito, T. ; Miura, N. ; Tamaru, T. ; Konishi, N. ; Uno, S. ; Morita, S. ; Fujii, T. ; Hinode, K.
Author_Institution :
Device Dev. Center, Hitachi, Japan
Abstract :
This paper describes robust 130 nm-node Cu dual damascene interconnection technology with low-k barrier SiCN, eliminating SiN. The total capacitance of the FSG/SiCN structure is designed to the same extent as that of the SiLK/SiN structure. We newly developed processes dedicated to SiCN and realized 130 nm-node Cu dual damascene interconnection with FSG/SiCN, resulting in good electrical characteristics and reliability.
Keywords :
capacitance; copper; dielectric thin films; integrated circuit interconnections; integrated circuit reliability; permittivity; silicon compounds; 130 nm; Cu; Cu dual damascene interconnection technology; SiCN; capacitance; electrical characteristics; low-k barrier: SiCN; low-k dielectric; reliability; robust 130 nm-node; Abrasives; Capacitance; Dielectrics; Electric variables; Etching; Integrated circuit interconnections; Robustness; Silicon compounds; Space technology; Wiring;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979407
